By Richard Gaggl
The emphasis of this booklet is on functional layout features for broadband A/D converters for communique structures. The embedded designs are hired for transceivers within the box of ADSL recommendations and WLAN purposes. a space- and power-efficient attention of a converter is obligatory to stay aggressive out there. the suitable selection for the converter topology and structure has to be performed very rigorously to bring about a aggressive FOM. The ebook starts with a short evaluate of simple options approximately ADSL and WLAN to appreciate the ADC specifications. At architectural point, matters on diversified modulator topologies are mentioned using the supplied know-how node. The layout concerns are mentioned intimately for contemporary electronic CMOS applied sciences, starting with 180nm through 130nm and taking place to 65nm characteristic dimension. Beside useful facets, demanding situations to mixed-signal layout point are addressed to optimize the converters by way of ate up chip zone, energy intake and layout for top yield in quantity construction. therefore, cautious concerns on circuit- and architectural- point are played through introducing a dynamic-biasing strategy, a feed-forward method and a answer in time rather than amplitude resolution.
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Extra resources for Delta-Sigma A/D-Converters: Practical Design for Communication Systems
The single-ended model of the switched-capacitor integrator is shown in Fig. 13. Any possible implementation of a feedback D/A-converter is not shown here to keep the presentiveness. Vi and Vo represents the input and output voltage, CS and CI the sampling and integration capacitors, respectively. In order to obtain an accurate model, it is very important to include the parasitic capacitances CP and CL associated with the input and output capacitances of the Operational Transconductance Amplifier (OTA).
13. Any possible implementation of a feedback D/A-converter is not shown here to keep the presentiveness. Vi and Vo represents the input and output voltage, CS and CI the sampling and integration capacitors, respectively. In order to obtain an accurate model, it is very important to include the parasitic capacitances CP and CL associated with the input and output capacitances of the Operational Transconductance Amplifier (OTA). CL also includes the bottom plate parasitic of CI . CSn is included to model the sampling operation of the next stage, whereby the top plate of CSn is connected to a perfect virtual ground during both clock phases.
Achieving very accurate analog transfer functions require high power drain for the active stages and consume more chip area for good device matching, which makes MASH topologies to be traded off against the beneficial stability behavior. 3 Discrete-Time vs. Continuous-Time Loopfilter In the previous subchapters, the loop transfer function H (z) has been written in the discrete-time domain. The majority of delta-sigma modulators in the literature are implemented as discrete-time circuits such as Switched-Capacitor (SC) circuits.